This work presents a low-power and high-speed comparator using Auxiliary Latch. The technique uses the Auxiliary Latch to increase the gain of the pre-amplifier at the beginning of the comparison phase and enhance the sensitivity of the comparator significantly, which reduces the required number of comparators to achieve the desired resolution, consequently leading to a decrease in the total power consumption. The improved Auxiliary Latch comparator is approved by implies of post-layout simulations in a 130 nm CMOS technology at a 1.2 V supply. The power consumption is achieved 150 𝜇w and the speed is enhanced by 104 ps.